The present invention relates to an arithmetic processing unit of floating-point data and, more particularly, to a processor for executing arithmetic operation of a trigonometric function, an inverse trigonometric function, an exponential function and a logarithmic function.
Execution of arithmetic operation of the above-mentioned functions basically includes processing in which input floating-point data is subjected to modulo reduction by use of a particular constant such as a divisor and a series expansion or a so-called CORDIC is carried out with respect to a remainder obtained by the modulo reduction. The constant used in this processing is obtained by rounding an irrational number such as .pi., e (exponent), etc. to a finite figure. For this reason, when the binary value of a mantissa part of the input data is close to that of a mantissa part of the particular constant, the more significant bits of the remainder become zero to reduce significant digits thereof. As a result, the product obtained by the series expansion or the CORDIC operation contains a large error.
If the bit length of the input data and the particular constant is increased, the reduction of significant digits of the remainder can be suppressed. However, this requires a large amount of hardware such as an arithmetic logic unit and registers.